Semiconductor devices are electronic components that exploit the electronic properties of semiconductor materials, principally silicon, germanium, and gallium arsenide. Semiconductor devices are manufactured both as single discrete devices and as integrated circuits (ICs), which consist of a number—from a few to millions—of devices manufactured and interconnected on a single semiconductor substrate. Semiconductor ICs are generally fabricated in a layer process which may include the main process steps of imaging, deposition and etching. The main process steps may be supplemented by doping, cleaning and planarization steps. A semiconductor IC may comprise both “active” devices such as transistors, and “passive” devices such as capacitors.
Capacitors are often formed in semiconductor devices and may be used, for example, in conjunction with an access transistor in a dynamic random access memory (DRAM) cell, or in conjunction with a power supply. A capacitor typically comprises two electrically-conductive plates (or structures) separated from one another by a dielectric (electrically insulating) layer (or space).
Trenches are often formed in semiconductor devices, and are often characterized as “shallow” or “deep”. A shallow trench may have a depth “d” of 200-300 nm, a width of at least 100 nm (can be as wide as desired), resulting in an aspect ratio (d:w) of approximately at most 3:1, more typically 2:1 or lower, such as 1:1. A typical use for a shallow trench is filling with oxide to isolate devices from one another. A deep trench may have a depth “D” of approximately 2000-10000 nm (2-5 microns), a width “W” of approximately 50-500 nm, is much deeper than it is wide, having an aspect ratio (D:W) of approximately 40:1, including at least 10:1. A typical use for a deep trench is forming a capacitor such as for a DRAM cell.
Generally, a “trench capacitor” comprises:                a trench (which may be a deep trench “DT”) formed in a substrate (such as bulk silicon),        a conductive plate formed in the substrate around the trench (sometimes referred to as “buried plate”),        a dielectric insulator formed on the walls (and bottom) of the trench, and        a conductor such as heavily-doped polysilicon filling the trench (sometimes referred to as “node conductor”, or “poly node”)        
Glossary
Unless otherwise noted, or as may be evident from the context of their usage, any terms, abbreviations, acronyms or scientific symbols and notations used herein are to be given their ordinary meaning in the technical discipline to which the invention most nearly pertains. The following terms, abbreviations and acronyms may be used throughout the descriptions presented herein and should generally be given the following meaning unless contradicted or elaborated upon by other descriptions set forth herein. Some of the terms set forth below may be registered trademarks (®).
When glossary terms (such as abbreviations) are used in the description, no distinction should be made between the use of capital (uppercase) and lowercase letters. For example “ABC”, “abc” and “Abc”, or any other combination of upper and lower case letters with these 3 letters in the same order, should be considered to have the same meaning as one another, unless indicated or explicitly stated to be otherwise. The same commonality generally applies to glossary terms (such as abbreviations) which include subscripts, which may appear with or without subscripts, such as “Xyz” and “Xyz”. Additionally, plurals of glossary terms may or may not include an apostrophe before the final “s”—for example, ABCs or ABC's.                capacitor A capacitor is a two-terminal device (electrical or electronic component) that can store energy in the electric field between a pair of conductive electrodes (called “plates”). The process of storing energy in the capacitor is known as “charging”, and involves electric charges of equal magnitude, but opposite polarity, building up on each plate.        CMP short for chemical-mechanical polishing. CMP is a process, using both chemicals and abrasives, comparable to lapping (analogous to sanding), for removing material from a built up structure. For example, after depositing and etching a number of elements, the top surface of the resulting structure may very uneven, needing to be smoothed (or levelled) out, prior to performing a subsequent process step. Generally, CMP will level out the high spots, leaving a relatively smooth planar surface.        dielectric A dielectric is a non-conducting material or substance. (A dielectric is an electrical insulator.) Some dielectrics commonly used in semiconductor technology are SiO2 (“oxide”) and Si3N4 (“nitride”). The insulating quality of a dielectric may be characterized by “k”, the dielectric constant. Generally, the higher the “k”, the better the insulating quality of the dielectric. Oxide, for example, has a k of approximately 3.9. A class of materials, referred to as “high-k” (or “high-K”) dielectrics, have a dielectric constant higher than that of oxide (k>3.9).        etching etching generally refers to the removal of material from a substrate (or structures formed on the substrate), and is often performed with a mask in place so that material may selectively be removed from certain areas of the substrate, while leaving the material unaffected, in other areas of the substrate. There are generally two categories of etching, (i) wet etch and (ii) dry etch.                    Wet etch is performed with a solvent (such as an acid) which may be chosen for its ability to selectively dissolve a given material (such as oxide), while leaving another material (such as polysilicon) relatively intact. This ability to selectively etch given materials is fundamental to many semiconductor fabrication processes. A wet etch will generally etch a homogeneous material (e.g., oxide) isotropically, but a wet etch may also etch single-crystal materials (e.g. silicon wafers) anisotropically.            Dry etch may be performed using a plasma. Plasma systems can operate in several modes by adjusting the parameters of the plasma. Ordinary plasma etching produces energetic free radicals, neutrally charged, that react at the surface of the wafer. Since neutral particles attack the wafer from all angles, this process is isotropic. Ion milling, or sputter etching, bombards the wafer with energetic ions of noble gases which approach the wafer approximately from one direction, and therefore this process is highly anisotropic. Reactive-ion etching (RIE) operates under conditions intermediate between sputter and plasma etching and may be used to produce deep, narrow features, such as STI trenches.                        mask The term “mask” may be given to a layer of material which is applied over an underlying layer of material, and patterned to have openings, so that the underlying layer can be processed where there are openings. After processing the underlying layer, the mask may be removed. Common masking materials are photoresist (resist) and nitride. Nitride is usually considered to be a “hard mask”.        plasma etching Plasma etching refers to dry etching in which semiconductor wafer is immersed in plasma containing etching species; chemical etching reaction is taking place at the same rate in any direction, i.e. etching is isotropic; can be very selective; used in those applications in which directionality (anisotropy) of etching in not required, e.g. in resist stripping.        resist short for photoresist. also abbreviated “PR”. Photoresist is often used as a masking material in photolithographic processes to reproduce either a positive or a negative image on a structure, prior to etching (removal of material which is not masked). PR is usually washed off after having served its purpose as a masking material.        RIE short for Reactive Ion Etching. RIE is a variation of plasma etching in which during etching, the semiconductor wafer is placed on an RF powered electrode. The plasma is generated under low pressure (vacuum) by an electromagnetic field. It uses chemically reactive plasma to remove material deposited on wafers. High-energy ions from the plasma attack the wafer surface and react with it. The wafer takes on potential which accelerates etching species extracted from plasma toward the etched surface. A chemical etching reaction is preferentially taking place in the direction normal to the surface—in other words, etching is more anisotropic than in plasma etching but is less selective. RIE typically leaves the etched surface damaged. RIE is the most common etching mode in semiconductor manufacturing.        STI short for shallow trench isolation. Generally, a trench etched into the substrate and filled with an insulating material such as oxide, to isolate one region of the substrate from an adjacent region of the substrate. One or more transistors of a given polarity may be disposed within an area isolated by STI.        